The present invention relates to improved spacers for use with field emission displays (FEDs). U.S. Pat. No. 5,063,327 discloses a prior art method of fabricating spacers for use in FEDs. However, as will be discussed below, the spacers disclosed by the ""327 patent are not ideal and there remains a need for improved spacers and for methods of making such improved spacers.
Prior to discussing spacers, the general background of FEDs will be briefly reviewed. FIG. 1 shows a cross sectional view of a portion of a prior art FED 100. FED 100 includes a cathode, or baseplate, 102 and an anode, or faceplate, 104. Baseplate 102 includes a substrate 106, a plurality of field emitters 108, an insulating layer 110, and a conductive grid layer 112. Insulating layer 110 is disposed over substrate 106, and grid layer 112 is disposed over insulating layer 110. Insulating layer 110 defines a plurality of void regions 114, and each emitter 108 is disposed over substrate 106 in one of the void regions 114. Grid layer 112 defines a plurality of apertures 116. Each aperture 116 corresponds to, and overlies, one of the void regions 114. The apertures 116 are positioned so that (1) the grid layer 112 does not obstruct a path 117 between the upper tips of the emitters 108 and the faceplate 104 and (2) a portion of the grid layer 112 is proximal to the tip of each emitter 108. The grid layer 112 is normally configured as a plurality of conductive column lines and the baseplate 102 also includes a plurality of conductive row lines 118 disposed between emitters 108 and substrate 106.
Faceplate 104 includes a glass plate 120, a transparent conductor 122; and a phosphor layer 124. Transparent conductor 122 is disposed on one major surface of glass plate 120, and phosphor layer 124 is disposed on transparent conductor 122. The faceplate 104 and baseplate 102 are spaced apart from one another and are disposed so that the phosphor layer 124 is proximal to the grid layer 112.
FED 100 also includes a plurality of spacers 130 disposed between the faceplate 104 and baseplate 102. The spacers 130 maintain the orientation between baseplate 102 and faceplate 104 so that the baseplate and faceplate are substantially parallel to one another. Outer walls (not shown) seal the outer periphery of FED 100 and the space between baseplate 102 and faceplate 104 is substantially evacuated (creating a vacuum of about 10xe2x88x922 to 10xe2x88x929 Torr). Since the space between faceplate 104 and baseplate 102 is substantially evacuated, atmospheric pressure tends to press baseplate 102 and faceplate 104 together. However, spacers 130 resist this pressure and maintain the spacing between baseplate 102 and faceplate 104.
FED 100 also includes a power supply 140 for (1) charging the transparent conductor 122 to a highly positive voltage (e.g., 3,500 Volts); (2) selectively charging selective ones of the column lines of the grid layer 112 to a positive voltage (e.g., 40 Volts); and (3) selectively charging selective ones of the row lines 118 to a negative voltage (e.g., xe2x88x9240 Volts).
In operation, voltages applied to the row lines 118, the grid layer 112, and the transparent conductor 122 cause emitters 108 to emit electrons 150 that travel along path 117 towards, and impact on, phosphor layer 124. Incident electrons 150 on phosphor layer 124 cause phosphor layer 124 to emit photons and thereby generate a visible display on faceplate 104.
The visible display of FED 100 is normally arranged as a matrix of pixels. Each pixel in the display is typically associated with a group of emitters 108, with all the emitters 108 in a group being dedicated to controlling the brightness of their associated pixel. For example, FIG. 1 shows a single pixel 160, with pixel 160 being associated with emitters 108a, 108b, 108c, and 108d. Pixel 160 could be a single pixel of a black and white display or a single red, green, or blue dot associated with a single pixel of a color display. Charging line 118a to a negative voltage simultaneously activates emitters 108a-d causing emitters 108a-d to emit electrons that travel towards and impact on phosphor layer 124 in the region of pixel 160. Normally, the row and column lines are arranged so that the emitters associated with one pixel can be controlled independently of all other emitters in the display and so that all emitters associated with a single pixel are controlled in unison. For convenience of illustration, FIG. 1 shows four emitters as being associated with a single pixel 160, however, a two dimensional array of about 2,000 emitters is normally associated with each pixel of an FED.
Ideally, the spacers 130 have several important characteristics. First, it is important for the cross section of the spacers 130 to be relatively small compared with the area of each pixel. Ideally, the spacers 130 are characterized by a relatively high aspect ratio (i.e., the spacer""s height is larger than its width). Typically, spacers 130 are about 200 to 2,000 microns high and about 25 microns wide. Such a high aspect ratio (1) provides sufficient spacing between the baseplate 102 and faceplate 104 to permit electrons traveling from emitters 108 towards faceplate 102 to acquire sufficient energy to cause phosphor layer 124 to emit photons and (2) minimizes the likelihood that electrons emitted by the emitters will be intercepted by the spacers rather than impacting the phosphor layer and thereby minimizes any effect that the spacers may have on the brightness of the display. The spacers 130 must also provide sufficient structural strength to resist the atmospheric pressure and thereby maintain the desired spacing between baseplate 102 and faceplate 104. It is also desirable for all spacers 130 to have the same height so they can provide uniform spacing between the baseplate 102 and the faceplate 104. It is also important for the spacers to be properly aligned with respect to the array of pixels so that dark regions in the display created where the spacers 130 contact the faceplate do not interfere with the display (e.g., it is desirable for the bottom of the spacers 130 to contact the grid layer 112 at selected locations that are between the apertures 116 and are equidistant from all the adjacent emitters). Since the spacers 130 are disposed within a vacuum, it is also important for the spacers to be formed from a vacuum compatible material (e.g., a material that does not outgas significantly).
The above-referenced ""327 patent discloses a method of using photolithography to form the spacers for an FED. More specifically, the ""327 patent discloses (1) disposing a layer of photosensitive polyimide over a baseplate (e.g., such as baseplate 102 as shown in FIG. 1); (2) disposing a mask between a radiation source and the polyimide layer, (3) exposing the masked polyimide layer to radiation; and (4) rinsing the exposed polyimide layer with an appropriate developer solution. The disclosed process xe2x80x9cpatternsxe2x80x9d the polyimide layer or transforms the polyimide layer into a plurality of posts. Following a vacuum baking, the posts may be used as spacers in an FED. The spacers disclosed by the ""327 patent suffer from several disadvantages. For example, polyimide is not an ideal photosensitive material. Also, polyimide is not an ideal material for use as a spacer in an FED.
In traditional photolithography, photoresist has been used to form only relatively thin features (e.g., one micron in height). However, recent work in the development of Micro Electro-Mechanical Systems (MEMS) has led to development of photoresists that can be used to form high aspect features. One such popular photoresist is known commercially as xe2x80x9cSU-8xe2x80x9d. SU-8 comprises bisphenol, which is an a/novolac epoxy resin, and is manufactured by Shell Chemical. Guxc3xa9rin et al. suggested in xe2x80x9cSU-8 photoepoxy: A new material for FDP and PDP applicationsxe2x80x9d (L. J. Guxc3xa9rin, C. W. Newquist, H. Lorenz, Ph. Renaud, Institute for Microsystems, Swiss Federal Institute of Technology) that photoresist could be used to form high aspect posts, however, such posts do not have the necessary structural strength for forming spacers in FEDs. Also, such posts are likely to outgas significant amounts of gas and are therefore not suitable for use in a vacuum environment. It would therefore be desirable to develop techniques for using photoresist to form posts that (1) are vacuum compatible, (2) have a high aspect ratio, and (3) provide sufficient structural strength to operate as spacers in a FED.
These and other objects are provided by an improved method for forming spacers in an FED. In one aspect of the invention, the method uses photoresist as a mold for forming spacers in an FED. Photolithographic techniques permit the photoresist mold to be precisely positioned with respect to other elements of the FED.
In one aspect of the invention, a layer of photoresist is used to form an array of high aspect photoresist posts. These posts are not suitable for use as spacers themselves, but they can be used according to the invention as a mold for forming the spacers. The posts are then coated with a layer of coating material (e.g., silicon oxide or silicon nitride). This forms an array of high aspect columns of the coating material. The high aspect columns may then be further treated (e.g., the posts of photoresist material may be removed) to form spacers for use in an FED. Such spacers are vacuum compatible (i.e., the coating material does not outgas significantly), are structurally strong, and can be accurately located so as not to degrade the quality of the display.
In another aspect, the photoresist posts may be treated with silicon, so that the silicon penetrates into the photoresist posts, and then exposed to reactive oxygen so that the oxygen and silicon react to form a coating of silicon oxide around the posts. Such posts may also be used as spacers in an FED.
In still another aspect, the invention provides an FED in which the spacers are formed as columns of coating material.